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20060102003720358
- MAXII-PCI接口CORE,MAXII-PCI接口CORE[分享]-MAXII-PCI interface CORE, MAXII-PCI interface CORE [share]
pci_express_crc
- PCI express CRC rtl core for Fpga/asic Designer
hgb_pci_host
- 内有一PCI 主 和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。 本PCI_HOST目前支持： 1、 对目标PCI_T进行配置； 2、 对目标进行单周期读写； 3、 可以工作在33MHZ和66MHZ 4、 支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的
ali
- The USB Host Controller is a synthesizable core and is part of the Fujitsu IPWare™ Library. The core has a complete PCI to USB interface. It is fully compliant with USB specification 1.0 and the USB Open HCI specification authored by Mic
ALTERA_PCI
- 关于ALTERA的PCI问答集Q1 What is PCI? What are the typical applications of a PCI bus? Q2 Who governs the PCI Specification? Q3 What level of participation does Altera have in developing PCI standards? Q4 What does the designer need to know about PCI t
hdinfo
- 查看硬件 CPU 频率：Pentium(R) Dual-Core CPU E5300 @ 2.60GHz CPU 厂商：GenuineIntel 主板:GBT - 42302e31 Award Modular BIOS v6.00PG 光驱型号：BENQ DVDROM DD18SA 网卡型号：Atheros AR8132 PCI-E Fast Ethernet Controller 内存大小：2037M 声卡：Realtek HD Audio output 显卡：
DesignCPCIanalogonFPGA
- 本文实现了8通道的12位D/A模拟输出板卡的设计。该设计是基于FPGA的3U CPCI板卡，可以提供8通道的模拟电压和电流输出，各路电压输出范围可以配置成0~5V、0~10V、-5~5V或-10V~10V，各路输出电流可以配置成4~20mA、0~20mA或0~24mA。本设计摒弃了常规的CPCI接口芯片，采用FPGA十PCI IP CORE的设计方案，大幅度提高了系统的集成度和调试速度，缩短了系统的开发周期。方案使用专门的WDM (windows driver model)开发工具Driver
Linux.Driver.Things.FULL
- 复旦大学一个学生写的Linux那些事PDF完整版本，本文涉及的内容有：USB、USB.CORE、EHCI、SCSI、PCI、BLOCK几个方面内容-The linux driver things full version. it include usb, usb.core, ehci, scsi, pci, block
pci_to_wb_latest[1].tar
- 该ip核实现了容量为16MB的、双字、可寻址存储镜像与wishbone总线的连接-This core implements a 16 MB DWord-addressable memory image in the Wishbone bus (so WB width is 32 bit). Its functionality is reduced to the minimum which is required by the PCI specification (and I m really t
dw_spi_pci
- linux 系统下专用DW SPI核心的PCI接口驱动程序，无私分享-PCI interface driver for DW SPI Core for linux system under special，Selfless sharing
host_pci
- Core PCI functionality used only by PCI hotplug.
PCIIP-core
- 基于FPGA的PCI ip core 设计源代码，里面包含所有的fifo,状态机源代码，drives 驱动源代码。-“fifo_control.v” Module FIFO_CONTROL includes control logic for single FIFO. It consists of read and write address generation and full, almost full, empty and almost empty status generatio
irq_remapping
- Broadcom specific AMBA PCI Core.
opsput_lan
- Broadcom specific AMBA. PCI Core in hostmode.
OF_DEVICE.RAR
- Broadcom PCI-core driver for Linux v2.13.6.
hotplug-pci
- Core PCI functionality used only by PCI hotplug.
driver_pcicore
- Sonics Silicon Backplane Broadcom PCI-core driver.
pci32_0_example
- pci core 程序 FPGA 7系列ip核-pci core FPGA 7 series ip nuclear program
testbench
- 这是基于xilinx ise软件中pci核的仿真程序。文件包括激励程序，顶层程序。可以用于modelsim仿真-This is based on xilinx ise software pci core simulation program. Files include incentive program, the top program. It can be used to simulate modelsim
spi-dw-pci
- PCI interface driver for DW SPI Core.